Give proper answers of each questions in good hand writing.

6. Design 16:1 MUX using 8:1 MUX and 2:1 MUX. (a) (b) What is Tri-state buffer? (e) Write VHDL code for a 8-bit wide tri-state buffer using sequential architecture style. ( 7. (a) Design and draw a gate level circuit for BCD to 7-segment decoder. (b) Write VHDL code for BCD to 7-segment Decoder using Data Flow Modelling. List all the steps necessary for analysis of a Moore FSM. Demonstrate all the steps with a suitable example. 8. (6 + 10 15)