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[H] CLO$: Analyze and design the biasing and the amplifier circuits of JFET Q8- Analyze the biasing and the amplifier circuits of JFET in the

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[H] CLO$: Analyze and design the biasing and the amplifier circuits of JFET Q8- Analyze the biasing and the amplifier circuits of JFET in the figure below. In a self- bias D-channel JFET, the operating point is to be set at lp - 1.5 mA and Vps -10 V. The JFET parameters are loss - 5mA and Vim-2V. Find the values of Rs and Rp. Given that Voo - 20 V. (marks, 10 mins)

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