Hello there,

I need help with writing a partial assembler for MIPS instructions in java.

OTHERS WORK "TO GET AN IDEA OF HOW TO DO IT" OR FOR ANY? REASON, NO EXCUSES. NO EXCEPTIONS, NO POSTING SOLUTIONS Your project is to write a partial disassembler f machine instructions that a compiler or assembler p original source instructions were that created those 32-bit machine instructions and outputs the possible source instructions that you must be able to disassemble are: add, sub bne. Ignore all other MIPS instructions or MIPS instructions. That is, your input will b igures out w , and. or. slt. I The specific machine instructions that you will disassemble (one after another in this c 0x032BA020, OxSCE90014, 0x12A90003, 0x022DA822. 0xADB30020, 0x02697824. 0xAE 0x018C6020, 0x0244A825, 0x158FFFF7, Ox8ECDFFFO That is, the above 32-bit instructions will be the input to your program. (Eight hex digits are 3.2 program will then analyze a 32-bit instruction and figure out what the opcode, register operands eel tree to embed them in the program itself so you can avoid typing them in each time Ids in the instruction are and then print out the assembly language instruction that produced it that the first instruction begins at address hex 9A040 and the rest follow right after that one. Yo output the address along with the instruction. For example, if your program determines that the first 32-bit machine instruction above is the in 10. 12 (S20) (it isn't, but if it were) then your output for that instruction would be 9A040 lw S10. 12 (S20) You'll then go on and do the next 32-bit instruction, specifying its address in hex (the address f instruction immediately following one at 9A040) and what instruction caused those 32-bits. T instruction should show the correct syntax so that an assembler could correctly evaluate it (wit exception of the branch instruction detailed below). Output the numerical registers (e to the symbolic descriptions (e.g. Ss3. Stl). For any load or store instructions, show the offse signed decimal number I suggest using a 16-bit variable (a short) for the I-format offset so that if the number is nega accurately handled. For example, if you take the number -4, it is represented in the 16-bit of When you do the bit-wise AND on the 32-bit instruction to remove the other 16 bits, you'll FFFC if you put it in a short but incorrectly get x0000FFFC if you put it in an int. if you p ormer for a load store. you 'll correctly show -4. but if you print out the latter you'll get a la umber (64K-4). which is an error. This makes it so you don't have to do sign-extension. the branch instructions (beq. bne). don't try to invent a label for the destination to bran dicate the address of the destination. So if you've disassembled a beq $7. S8 instruction anching to an instruction at address 9A080. then your output should be or ddre