Hello, through the text of the theory and through the procedure that I have taken and the results that you have recorded in the table,
Hello, through the text of the theory and through the procedure that I have taken and the results that you have recorded in the table, so how do I please help me in giving an answer to the discussion and making a summary of it
discussion
1. From the results you obtained, compare with the theoretical calculation of the midrange gain and critical frequencies. and Suggest a suitable application for the circuit in communication engineering. and Comment on any observation you made as you conduct the simulatio
3. Theory: When amplifier stages are cascaded to form a multistage amplifier, the dominant frequency response is determined by the responses of the individual stages. There two cases to consider: 1. Each stage has a different lower critical frequency and a different upper frequency. When the lower critical frequency for of each stage is different, the dominant lower critical frequency equals to that of the stage with highest fa For upper critical frequency fcu equals to the lowest critical frequency. 2. Each stage has the same lower critical frequency and the same upper critical frequency: fcl fa 121 - 1 fou = fou V21 - 1 The overall bandwidth is given by: BW = fcu for Multistage voltage gain The overall voltage gain of cascade amplifiers is equal to the product of the individual voltage gains as shown in Figure 1. A, = Ay1A, 2Ay3 *** Ayn Input A As AB o Figure 1. Multistage voltage gain. Amplifier voltage gain is often expressed in decibels (dB) as follows: A,(dB) = 20 log A, This is particularly useful in multistage systems because the overall voltage gain in dB is the sum of the individual voltage gains in dB. Al(ab) = Ayi(dB) + A/2(dB) + ... + Ayn(dB) 4. Procedure 1. Use multisim simulation package to simulate the circuit shown in the figure 2. Consider the following values: Transistor type 2N2222A, Cbe = 25pF. Cbc = 8pF. Vc = 10V. VER = 10V. . 2. Apply a sinusoidal signal of 0.282 mV pk-pk and vary the frequency of the input signal from 100Hz to 2MHz in suitable steps and measure the amplitude of the output signal in each step for the two stages. Arrange your results in a table. 3. Calculate the gain for each frequency increment for the 2nd stage Vou according to: Gain = Our in 4. Procedure 1. Use multisim simulation package to simulate the circuit shown in the figure 2. Consider the following values: Transistor type 2N2222A, Cbe = 25pF. Cbc = 8pF. Vc = 10V. VER = 10V. . 2. Apply a sinusoidal signal of 0.282 mV pk-pk and vary the frequency of the input signal from 100Hz to 2MHz in suitable steps and measure the amplitude of the output signal in each step for the two stages. Arrange your results in a table. 3. Calculate the gain for each frequency increment for the 2nd stage Vou according to: Gain = Our in Voc +10 V Ist stage 2nd stage R 47k12 R3 4.7k12 RE 47 R 4.7 k12 CE C OV C3 I VH @ 46 Q2 1 uF IMF IF } R2 10 R4 1.0 k 2 C2 100 uF R6 10 R$ 1.0 k 2 C4 100 uF = = IH Boc=Bc = 150 for Q, and Q2 Figure 2. Multistage amplifier circuit simulation. 4. Plot the gain-frequency plot on a semi-log graph paper. 5. From you graph, estimate the midrange gain of the amplifier. 6. Also, estimate the critical frequencies for high and low frequency regions. 7. Calculate the bandwidth of the amplifier. Frequenc 100Hz y Output Voltage p-p) 2.22 Gain=Yout/Vin / 7.8*10 Gain in dB 100Hz 77.91 500Hz 1KHz 3.33 3.439 11.8*10 12.2010 1.44 1.72 5KHz 3.375 11.97*10' 1.56 10KHz EOKHz 3.247 3.32 11.51*10' 11.8*10' 1.22 1.43 50KHz | 100KHz 300KHz 500KHz 3.27 2.69 1.26 778.029 11.6*10 9.5*10' 4.5*10' 4.5*10 81.289 795.55 73.1 68.8 700KHz 555.765 2755.96 65.9 1MHz 387.001 1790.79 62.7 1.5MHz 2MHz 25.555 19.24B 920.3 692.4 .3 56.81 3. Theory: When amplifier stages are cascaded to form a multistage amplifier, the dominant frequency response is determined by the responses of the individual stages. There two cases to consider: 1. Each stage has a different lower critical frequency and a different upper frequency. When the lower critical frequency for of each stage is different, the dominant lower critical frequency equals to that of the stage with highest fa For upper critical frequency fcu equals to the lowest critical frequency. 2. Each stage has the same lower critical frequency and the same upper critical frequency: fcl fa 121 - 1 fou = fou V21 - 1 The overall bandwidth is given by: BW = fcu for Multistage voltage gain The overall voltage gain of cascade amplifiers is equal to the product of the individual voltage gains as shown in Figure 1. A, = Ay1A, 2Ay3 *** Ayn Input A As AB o Figure 1. Multistage voltage gain. Amplifier voltage gain is often expressed in decibels (dB) as follows: A,(dB) = 20 log A, This is particularly useful in multistage systems because the overall voltage gain in dB is the sum of the individual voltage gains in dB. Al(ab) = Ayi(dB) + A/2(dB) + ... + Ayn(dB) 4. Procedure 1. Use multisim simulation package to simulate the circuit shown in the figure 2. Consider the following values: Transistor type 2N2222A, Cbe = 25pF. Cbc = 8pF. Vc = 10V. VER = 10V. . 2. Apply a sinusoidal signal of 0.282 mV pk-pk and vary the frequency of the input signal from 100Hz to 2MHz in suitable steps and measure the amplitude of the output signal in each step for the two stages. Arrange your results in a table. 3. Calculate the gain for each frequency increment for the 2nd stage Vou according to: Gain = Our in 4. Procedure 1. Use multisim simulation package to simulate the circuit shown in the figure 2. Consider the following values: Transistor type 2N2222A, Cbe = 25pF. Cbc = 8pF. Vc = 10V. VER = 10V. . 2. Apply a sinusoidal signal of 0.282 mV pk-pk and vary the frequency of the input signal from 100Hz to 2MHz in suitable steps and measure the amplitude of the output signal in each step for the two stages. Arrange your results in a table. 3. Calculate the gain for each frequency increment for the 2nd stage Vou according to: Gain = Our in Voc +10 V Ist stage 2nd stage R 47k12 R3 4.7k12 RE 47 R 4.7 k12 CE C OV C3 I VH @ 46 Q2 1 uF IMF IF } R2 10 R4 1.0 k 2 C2 100 uF R6 10 R$ 1.0 k 2 C4 100 uF = = IH Boc=Bc = 150 for Q, and Q2 Figure 2. Multistage amplifier circuit simulation. 4. Plot the gain-frequency plot on a semi-log graph paper. 5. From you graph, estimate the midrange gain of the amplifier. 6. Also, estimate the critical frequencies for high and low frequency regions. 7. Calculate the bandwidth of the amplifier. Frequenc 100Hz y Output Voltage p-p) 2.22 Gain=Yout/Vin / 7.8*10 Gain in dB 100Hz 77.91 500Hz 1KHz 3.33 3.439 11.8*10 12.2010 1.44 1.72 5KHz 3.375 11.97*10' 1.56 10KHz EOKHz 3.247 3.32 11.51*10' 11.8*10' 1.22 1.43 50KHz | 100KHz 300KHz 500KHz 3.27 2.69 1.26 778.029 11.6*10 9.5*10' 4.5*10' 4.5*10 81.289 795.55 73.1 68.8 700KHz 555.765 2755.96 65.9 1MHz 387.001 1790.79 62.7 1.5MHz 2MHz 25.555 19.24B 920.3 692.4 .3 56.81
