Hi can you help me solve the following Computer Architecture and Organisation Problem on (Instruction Set Architecture and designing of processor)? Please show me the step by step solution on how to design. Thank you.
7. Given the ISA of Processor pico CP-SYS 2013 and components, General Purpose Register of 4 x 8 bits You may use unlimited numbers of multiplexor, adder and register 7 Instructions Memory with 8-bit address and 8-bit data bus Extender will give 0000,[immediate)] and immediate],0000] depending on EXT_OP (0 and 1 LI Simmediate respectively) (HType), opcode-1100 PC-PC+1, REG(3)-0000[immediate) Instruction Memory and Data Memory are sperated. LU $Immediate (HType), opcode-1101 PC-PC+1, REG3-[immediate],0000) ALU with the following operation (Z=1 when s is 0,) $RD, $RS (R-Type), opcode -1000 DESCRIPTION S-A+B S-A S-B S-0 ALU_OP C-PC+1, REG[RD)-MEMIREGIRS)] W $RD, $RS C-PC+1, MEMIREGIRS])-REGRD) DD $RD, $RS C-PC+1, REG RD)-REGIRD REG(RS OV $RD, $RS C-PC+1, REG[RD)-REG RS (R-Type), opcode = 1001 01 10 (R-Type), opcode-0010 2 instruction formats (8 bit) Format (# bit) R-type -Type (R-Type), opcode 0011 RD RS Bz sRD, $RS OP (R-Type), opcode-0111 OP Immediate F (REG[RS)--0) PC-PC+REGIRD)+1 ELSE PC-PC+1 Please design the complete Data Path of Processor pico CP-SYS 2013 7. Given the ISA of Processor pico CP-SYS 2013 and components, General Purpose Register of 4 x 8 bits You may use unlimited numbers of multiplexor, adder and register 7 Instructions Memory with 8-bit address and 8-bit data bus Extender will give 0000,[immediate)] and immediate],0000] depending on EXT_OP (0 and 1 LI Simmediate respectively) (HType), opcode-1100 PC-PC+1, REG(3)-0000[immediate) Instruction Memory and Data Memory are sperated. LU $Immediate (HType), opcode-1101 PC-PC+1, REG3-[immediate],0000) ALU with the following operation (Z=1 when s is 0,) $RD, $RS (R-Type), opcode -1000 DESCRIPTION S-A+B S-A S-B S-0 ALU_OP C-PC+1, REG[RD)-MEMIREGIRS)] W $RD, $RS C-PC+1, MEMIREGIRS])-REGRD) DD $RD, $RS C-PC+1, REG RD)-REGIRD REG(RS OV $RD, $RS C-PC+1, REG[RD)-REG RS (R-Type), opcode = 1001 01 10 (R-Type), opcode-0010 2 instruction formats (8 bit) Format (# bit) R-type -Type (R-Type), opcode 0011 RD RS Bz sRD, $RS OP (R-Type), opcode-0111 OP Immediate F (REG[RS)--0) PC-PC+REGIRD)+1 ELSE PC-PC+1 Please design the complete Data Path of Processor pico CP-SYS 2013
