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I need to design a 128-bytes ROM subsystem starting at address 00H constructed using 128x2 ROM chips . What is the address bit width and

I need to design a 128-bytes ROM subsystem starting at address 00H constructed using 128x2 ROM chips. What is the address bit width and data bit width I would need?

I also need to design a 32-bytes RAM subsystem starting at address E0H constructed using 16x8 RAM chips. What is the address but width and data bit width.

Both subsystems interact with an 8-bit address bus and 8-bit data bus.

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