i need to see the JK flip flops and AND gates to go the JK fli flops E and F

Design a digital system with two flip-flops, E and F, and one 4-bit binary counter, A. The individual flip-flops in A are denoted by A4,A3,A2, and A1, with A4 holding the MSB of the count. A start signal S initiates the system operation by clearing the counter A and flip-flop F. The counter is then incremented by 1 starting from the next clock pulse and continues to increment until the operations stop. Counter bits A3 and A4 determine the sequence of operations: If A3=0,E is cleared to 0 and the count continues If A3=1,E is set to 1 ; then If A4=0, the count continues If A4=1,F is set to 1 on the next clock pulse and the system stops counting