I sent this question at least 5 times and none of them drew a datapath.

I gave them a dislike. Please draw Datapath now.

Don't explain how to do it. I need a drawing. I can't draw

1. Design your datapath on paper. You will design cypher detector to be used for security. It vill detect a particular number sequence incoming from an input. Use Quartus and Verilog HDL. Implement Control Unit and Datapath. Control Unit will be designed as 3 always blocks Your design will get a 16-bit number showing the cypher. For instance if the cypher is 1-2-3-4 then the 16-bit input will be 010000110010 0001. The second input is 4-bit from where you will read numbers sequentially. Third input will be the read input, which will be made 1 when the 4 bit input is ready. If read input is 0 you will not read the 4-bit number as it is not ready. Read each 4-bit number only at the positive edge of the read input. The last inputs are reset and clock signals. The first output of your design will be 1-bit signal, which becomes 1 only after the right cypher numbers are collected. The second output will be 8-bits and will show the sum of all numbers until the right cypher is detected. (See the example at the end) 1. Design your datapath on paper. An Example Case: Cypher: 0010011000000001 (Cypher is 2-6-0-1) 4-bit inputs: 00000001001100000011010000010000001000010001000001100010 The first output will become 1 after the last four numbers are observed. The second output will be 24 , i.e. 00011000. 1. Design your datapath on paper