If a cache can deliver $0\mathrm{.}625$ of load$/$store requests from CPU, and suppose a processor has $2$ levels of hierarchy with Tcache $=1$ cycle, and TRAM$=100$ cycles. What is the AMAT?Select one:a$.48\mathrm{.}5$ cycleb. nonec. $24\mathrm{.}5$ cyclesd. $63\mathrm{.}5$ cyclese. $38\mathrm{.}5$ cycles