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If the designer decides to merge 3 and 4 into a stage, and this new stage takes 4 secs to work on each instruction. Therefore
If the designer decides to merge 3 and 4 into a stage, and this new stage takes 4 secs to work on each instruction. Therefore this new computer pipeline now has three stages, and the time each stage needs to complete its job is 2ns, 2ns, and 4ns. a) How many instructions can be concurrently executed by this computer? b) What MIPS can now this computer reach?
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