If the inputs to a

TL.3

-input NAND gate are

(A

)

=L@W;B=LOW,C=

(

LOW)

, then the DN-OFF conditions of each transistar

(Q1,Q2,Q3,Q4)

in the cirouit are: Q1-ON, Q2-OF, Q3-ON, Q4-OFF\ select ant\ true\ false

If the inputs to a Th. 3 -input NanD gate are (A= LOW; B=LOW,C=LOW), then the ON-OFF