Answered step by step
Verified Expert Solution
Link Copied!

Question

1 Approved Answer

Im having a problem understanding Question 2, 4 and 5. If you could explain your answer, that would be great. Question # 1. Convert the

Im having a problem understanding Question 2, 4 and 5. If you could explain your answer, that would be great. image text in transcribed
Question # 1. Convert the decimal numbers +2 and +32 to binary, using the signed 2's complement representation and enough digits to accommodate them. Then perform the binary subtraction equivalent of (+32)-62), (2)-(+32) and (-32)-(2). Finally convert the answers back to decimal and verify that they are correct. Question #2. For the Boolean expression F(x,y,z)-xyz' +xyz'+yz' a) Use theorems and postulates that result in an equivalent Boolean expression that reduces the number of literals to just one. n diagram consisting of AND, OR and INVERTION gates c) Derive a product of sums expression and provide an implementation diagram consisting of OR, AND and INVERTION gates Question #3. Implement the following four Boolean expressions with three half adders (Hint: a half adder is built with one 2 input AND gate and one 2 input OR gate) D-AeBec F ABC, + (A'+B')C G- ABC Question #4. For the four-variable sum of minterm expression F(A,B,C)- (0,1,2,5,7) a) Draw its K-map. b) Provide for each minterm a list of all its 'prime implicants' c) From the d) Provide a minimum coverage for the map. prime implicant list of part b) circle the ones that are essential Question#5. After drawing the K-map corresponding tothe sum of minterms expression FA,B,C,D)-2(1,3,4,6,9,11,12,14) use this map to find Boolean expressions for the coverage of either 1's or 0's giving rise to: a) AND-OR gate levels implementation diagram followed by an alternative NAND-NAND gate levels one. b) OR-AND gate levels implementation diagram followed by an alternative NOR-NOR gate levels one. c) AND-OR-INV gate levels implementation diagram followed by an alternative NAND-AND (or wired AND) gate levels one d) OR-AND-INV gate levels implementation diagram followed by an alternative NOR-OR (or wired OR) gate levels one

Step by Step Solution

There are 3 Steps involved in it

Step: 1

blur-text-image

Get Instant Access to Expert-Tailored Solutions

See step-by-step solutions with expert insights and AI powered tools for academic success

Step: 2

blur-text-image

Step: 3

blur-text-image

Ace Your Homework with AI

Get the answers you need in no time with our AI-driven, step-by-step assistance

Get Started

Recommended Textbook for

Advances In Databases And Information Systems 14th East European Conference Adbis 2010 Novi Sad Serbia September 2010 Proceedings Lncs 6295

Authors: Barbara Catania ,Mirjana Ivanovic ,Bernhard Thalheim

2010th Edition

3642155758, 978-3642155758

More Books

Students also viewed these Databases questions