Implement in VHDL

2. Full Adder The circuit diagram and truth table of a full adder is shown in Figure 2. Implement full adder using Xilinx ISE. Write a testbench and verify your design for all the possibilities P2 A BCin Sum Cout Int HA1 irt2 Cout 0 Cin a) 101 0 b) Figure 2 a) schematic of a full-adder b) truth table of a full adder