Implementing LC-3s state transitions in Logisim

In this lab you will implement the state machine that represents the states in LC-3s CPU, as well as a few other parts. This is leading up to the final project, which will entail implementing a functioning part of LC-3. There is more information about these parts in the textbook, and in lecture 5 and 6. The LC-3 circuit diagram looks like:

1.1. Control Unit

The control unit consists of several vital pieces of a processor: it contains the Instruction Register, Program Counter, and current state of the instruction cycle. Add a circuit to your workspace called control_unit, and create the circuit in this part of the workspace. First of all, decide how you are going to represent the six states of the instruction cycle. Note that the transitions dont depend on any extra input only the clock. You will be outputting signals to different parts of your processor based on the current state, so make sure that you uniquely represent all six states. Create this state machine as a circuit

. 1.2. Program Counter

The control unit contains the program counter, which holds a 16 bit address. Create a 16 bit register in control_unit and label it as your program counter. There are two ways that the PC changes in LC-3: either there is a control instruction, or the Fetch step of the instruction cycle finishes. For now, ignore the possibility of control instructions and build a circuit that increments the PC by 1 at the Decode step. That one-step delay is to ensure that the PC increment doesnt interfere with loading the next instruction into the instruction register.

1.3. Memory

Before we start work on the instruction register, our circuit needs some memory to work load instructions from! In the main workspace, create a RAM object with the correct address and data bit width, and change its interface to separate load/store. Include the two registers, MAR and MDR, and attach them to appropriately to the RAM. The MAR should connect to the address, and the MDR should connect to both the input and output of the RAM

1.4. Instruction Register

The last part of the control unit! This register holds the current instruction, which is pretty important. Create the register back in the control_unit circuit. Set the enable input to be on only when in the fetch state.

1.5. Control Unit inputs/outputs

In the final project we will start hooking up the different sections of the processor. Create some inputs and outputs in the control unit by making an input or output pin (which will be an input/output pin on the circuit when we add the control_unit to a different workspace: A 1-bit clock output that connects to the clock that drives your state machine A 16-bit input that connects to the instruction register A 1-bit output that is on when in the fetch state A 4-bit output that is the highest four bits of the instruction register (the opcode)