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In the BCD up-down counter circuit shown below, four 2-input multiplexers are used to select the correct value to be loaded in. Modify the circuit

In the BCD up-down counter circuit shown below, four 2-input multiplexers are used to select the correct value to be loaded in. Modify the circuit so that the multiplexers are not needed. image text in transcribed
0 ClearClear D3 D2 Di Do 4-bit Binary Overflow Count Up-down Counter Own with Parallel Load Clock Down Load Up Dn 03 02 01 0o

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