In this exercise, you will design a finite state machine and specify gate/flip-flop logic which correctly dispenses candy from a machine when the correct amount of money has been received Rules: 1) The candy (there is only one kind) costs exactly 20 cents. 2) The only available coins are nickels and dimes. 3) Your FSM has two input signals: a. N (true when a nickel has been detected) b. D (true when a dime has been detected) c. No more than one of these signals can be true at one time. d. Bach signal is true for one cycle for each corresponding coin 4) Your FSM has two output signals: a. C (true dispenses candy and keeps the coins) b. R (returns the coins and keeps the candy) Each of these signals are to be true for one cycle if the corresponding function is to be performed c. 5) You select the number and meaning of the state variables in your FSM, with the exception that your FSM will begin in state 0, all state bits being false. This is also the state your FSM returns to after issuing a C or R signal return to the initial state on the next cycle. state on the next cvcle. 6) When the exact amount of 20 cents has been reached, issue the C signal and 7) If the coinage exceeds 20 cents, issue the R signal and return to the initial What to do: a) Draw a state diagram for your FSM. A Moore-type implementation is recommended. b) Assign state variables to the states and produce a state transition table for your FSM c) From the state transition table, show the contents of a ROM implementation. d) Determine the logic for the next value of each state variable, and for each output. Minimize the logic using Karnaugh maps