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In this problem, we will explore how deepening the pipeline affects performance in two ways: faster clock cycles and increased stalls due to data and
In this problem, we will explore how deepening the pipeline affects performance in two ways: faster clock cycles and increased stalls due to data and control hazards. Assume that the original machine is a stage pipeline with a ns clock cycle. The second machine is a stage pipeline with a ns clock cycle. The stage pipeline experiences a stall due to a data hazard every five instructions, whereas the stage pipeline experiences three stalls every eight instructions. In addition, branches constitute of the instructions, and the misprediction rate for both machines is
a What is the speedup of the stage pipeline over the stage pipeline, taking into only data hazards?
b If the branch mispredict penalty for the first machine is cycles but the second machine is cycles, what are the CPIs of each, taking into account the stalls due to branch misprediction?
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