Instruction Formats

The next two questions refer to the following system:

A certain ISA has a $24-$bit word size, uses single word $(24-$bit$)$ instructions, has $32$ opcodes, $64$ registers,

and $256$ M of byte$-$addressable memory. One group of instructions in this ISA takes the form:

OPCODE $|$ DESTINATION REGISTER $|$ SOURCE REG. $|$ Flag $|$ IMMEDIATE VALUE

Or

OPCODE $|$ DESTINATION REGISTER $|$ SOURCE REG. $1|$ Flag $|$ SOURCE REG. $2$

A single bit in the instruction $("$Flag$")$ is used to differentiate these two addressing modes.

Another group of instructions takes the form

OPCODE $|$ SOURCE$/$DESTINATION REGISTER $|$ PC OFFSET

$4$

Where PC Offset is the $2$s complement "distance" from the current PC to the labeled location.

$16.$ How many bits are required for addressing $($i$.$e$.$ what is the size, in bits, of a memory address$)?$

a$.32$ bits

b$.30$ bits

c$.28$ bits

d$.31$ bits

e$.16$ bits

$17.$ How will the bits in the instruction be distributed between opcode and operands? Answers are

listed as bits for opcode $/$ bits for operands

a$.4$ bits $/20$ bits

b$.4$ bits $/28$ bits

c$.5$ bits $/19$ bits

d$.5$ bits $/27$ bits

e$.6$ bits $/26$ bits

$18.$ How many bits can be used to represent an immediate value as an operand?

a$.32$ bits

b$.20$ bits

c$.28$ bits

d$.1$ bit

e$.6$ bits

$19.$ How f