Just solve Q) D

Consider the circuit below that adds the two 2-bit numbers A1A0 and B1BO. The delay of each gate is written on it. A bubble at the input of a gate means that input is inverted: BO 3ns 00 B1 A1 2ns B1 BO A1 2ns A1 B1 , 2ns A1 B1 2ns 5ns 01 A1 B1 Ins BO A1 B1 3ns A1 0 BO 2ns 3ns 02 TTIT TITT A1 B1 BO AO B1 BO 3ns 2ns c. (7 points) Write a different module for the whole circuit using a single assign statement for each output. You will have a total of 3 assign statements. Add the delay of each output. d. (15 points) Write a test bench that tests and verify the operation of the two modules in (b) and (c) above for the following input combinations. Put 20 ns delay between each consecutive test inputs and verify that your circuits work properly. Comment on any difference you observe between the two circuits and attach a snapshot of the simulation results. 010 A1 A0 (Binary) B1 BO (Binary) Expected Output: 02 01 00 00 01 001 10 00 01 01 010 01 11 100 11 01 100 10 11 101 11 11 110