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Lab #3 A. Aims Identifying the Properties of a Synchronous Counter 1) Expose the student with experience on constructing synchronous counter circuit using Flip-Flop

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Lab #3 A. Aims Identifying the Properties of a Synchronous Counter 1) Expose the student with experience on constructing synchronous counter circuit using Flip-Flop IC, Basic Gate ICs, Breadboard and ETS-5000 Digital Kit. 2) Promote critical thinking among students by analysing the given circuit and identifying the behaviour of the digital circuit. B. Objectives The objectives of this lab activity are to: | 1) Implement a synchronous counter circuit into physical circuit using Breadboard, Flip-Flops, Basic Gates and Switches. 2) Completing the next-state table of the counter circuit. 3) Sketch the state diagram of the counter circuit. 4) Identify the properties of the counter. C. Materials And Equipment Materials and equipment required for this lab are as follows: Item Name 1. Breadboard 2. 7408 Quad 2-Input AND 3. 7404 Hex Inverter 4. 7432 Quad 2-input OR 5. 7476 Dual J-K Flip Flop 6. ETS-5000 Digital Kit Number of Item 1 1 1 1 1 1 D. Preliminary Works 1) Determine the logic level for each input combinations in Table 1 so that the desired result can be realized. Table 1 Desired Result PRE CLR LR JK CLK Q Set initial value Q = 1 Output Q stays the same 1 1 => Output Q become 0, no change => in asynchronous input Output Q is not the previous Q 1 1 RESET Q 1 1 => SET Q 1 1 2) Answer all questions. a) Which state that JK flip-flop has, but not on SR flip-flop. b) Identify whether the JK flip flop in 7476, is a positive-edge triggered or negative- edge triggered flip flop. E. Lab Activities 1) You are given a counter circuit as shown in Figure 4. Switch 11 Switch 7 (X) Switch 0 Pusler Switch A 7408 7404 7432 7476 LED 1 LED 0 Figure 4: A Synchronous Counter Circuit 2) By using all materials and equipment's listed in section C, construct the physical circuit of Figure 4. (Make sure all ICs are connected to Vcc and GND). 3) Investigate the behaviour of the counter by observing the next state of the counter for all combination of Present State and X values. Complete the NextState table of the counter in Table 2. Ensure the Switch 0 is in HIGH state. (0=LOW, 1=HIGH) Table 2 Switch 7 Present State Next State Q1 Qo X LED 1 LED 0 Q1 LED 1 Qo LED 0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 4) By referring to the Next-State in Table 2, sketch the state diagram of the counter. 5) By referring to the Next-State in Table 2 and the state diagram in (4), answer all questions. a) What is the main indicator to decide that the counter is a synchronous counter? b) How many states are available for the counter and what are they? c) What is the function of Switch 7 (X) in the circuit? d) What is the function of Switch 0 and Switch 1 in the circuit? e) Is the counter a saturated counter or recycle counter? 6) Referring to state diagram in 4, draw and built a synchronous counter using D flip-flop. a) Built the next state and transition table using the header in Table 3 Input Present State Table 3 Next State X Q1 Q0 Q1+ Q0+ D1 JK FF Transition DO b) Get the optimized Boolean expression. c) Draw the complete final circuit design in Deeds. 7) Repeat steps in Q(6) using T flip-flop.

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