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Let us use a translation look - aside buffer called TLB that is fast - lookup hardware cache with the access time can be neglected

Let us use a translation look-aside buffer called TLB that is fast-lookup hardware cache with the access time can be neglected or in other words, zero. We assume the average memory access time is 20ns. If the hit ratio is 90%, what is the effective access time (EAT)? What is the slowdown ratio due to miss? If we get the EAT is 20% greater than the memory access time, what is the hit ratio H we desire? b. Let us consider a similar solution but the fast cache access needs time as well. Assume it needs 5ns. Also assume the memory access is 20ns. So, all access has two accesses, one for table lookup and one for data and instruction. The only difference is that one for hit it needs 25ns while for miss is needs 40ns. We can calculate the effective access time like a) as well. If the hit ratio is 90%, what is the EAT? What is the slowdown ratio due to miss? If the EAT is 20% greater than the hit memory access time, what is the hit ratio H

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