Mark the statements concerning Gate Arrays which are true.

A. Gate Arrays are usually less expensive than Standard Cells because a part of their layout (the part corresponding to the uncommitted cells) is already defined and is identical for all users. This reduces the number of masks needed in the manufacturing process, thus lowering the cost.

B. Gate Arrays have better performances, in terms of integration density, speed and consumption, than Standard Cells.

C. Gate Arrays are based on the existence of uncommitted cells on the silicon surface that must be customized to form the desired gates or memory elements.

D. Gate Arrays have better performances, in terms of speed and consumption, than FPGAs.

E. The position, size and/or layout of the uncommitted cells of a Gate Array can be modified by the designer.

F. There exist computer-aided design (CAD) tools that automatically create the layers required to transform the uncommitted cells of a Gate Array into the desired logic component (gates, memory elements, etc.)