Memory Caching: Explain the answers.
4. (8 pts) Memory Caching-L1 & L2 and the Translation Lookaside Buffer (TLB) In Chapter 7.6.7 the book describes when a reference is made to both L1&L2 cache and to virtual memory a. The book states "If the referenced word is not in the cache, then the block that contains the word is read into the cache from the main memory, and the referenced word is then taken from the cache." The cache referenced is the L1&L2 cache and must be configured as one of the following cache modes to fit this description. Circle the correct answer iWrite Through Poliey i Write Back Policy Write Allocate .Write No-allocate b. When the processor generates a memory reference and causes a page to be flushed from memory, what happens to the TLB& the L1&L2 caches. iThe dirty block in the L1&L2 caches remains in cache and the physical page ii. The dirty block in the Ll&L2 caches is flushed from cache and the physical ii. The dirty block in the L1&L2 caches remains in cache and the physical page i The dirty block in the L1&L2 caches is flushed from cache and the physical address remains in the TLB page address is flushed from the TLB address is flushed from the TLB page address remains in the TLB c. What happens when a virtual memory page frame is to be replaced (flushed) with its Present Bit" set to 1' and its "Dirty Bit" set to 1 i. The page is replaced without writing the flushed page to disk with the new ii. The page is replaced without writing the flushed page to disk with the new i. The page is replaced after writing the flushed page to disk with the new pages "Present Bit" set to '1' and its "Dirty Bit" set to 'O pages "Present Bit" set to 0' and its "Dirty Bi" set to 0" pages "Present Bit" set to '0' and its "Dirty Bit" set to 1 The page is replaced after writing the flushed page to disk with the new pages "Present Bit" set to '1' and its "Dirty Bit" set to 0 d. What happens when the word referenced by the processor is in a virtual page that is NOT present in the TLB? Figure 7-38 i. The processor retrieves the virtual to physical page mapping from the ii. The processor retrieves the virtual to physical memory page mapping from ii. The processor calculates the virtual to physical memory page mapping from memory table, updates the TLB with the new mapping, and retrieves the data from the physical memory the page table in memory, retrieves the data from the physical memory, but does not update the TLB with the new mapping a base address already defined in a CPU register, updates the TLB with the new mapping, and retrieves the data from the physical memory 4. (8 pts) Memory Caching-L1 & L2 and the Translation Lookaside Buffer (TLB) In Chapter 7.6.7 the book describes when a reference is made to both L1&L2 cache and to virtual memory a. The book states "If the referenced word is not in the cache, then the block that contains the word is read into the cache from the main memory, and the referenced word is then taken from the cache." The cache referenced is the L1&L2 cache and must be configured as one of the following cache modes to fit this description. Circle the correct answer iWrite Through Poliey i Write Back Policy Write Allocate .Write No-allocate b. When the processor generates a memory reference and causes a page to be flushed from memory, what happens to the TLB& the L1&L2 caches. iThe dirty block in the L1&L2 caches remains in cache and the physical page ii. The dirty block in the Ll&L2 caches is flushed from cache and the physical ii. The dirty block in the L1&L2 caches remains in cache and the physical page i The dirty block in the L1&L2 caches is flushed from cache and the physical address remains in the TLB page address is flushed from the TLB address is flushed from the TLB page address remains in the TLB c. What happens when a virtual memory page frame is to be replaced (flushed) with its Present Bit" set to 1' and its "Dirty Bit" set to 1 i. The page is replaced without writing the flushed page to disk with the new ii. The page is replaced without writing the flushed page to disk with the new i. The page is replaced after writing the flushed page to disk with the new pages "Present Bit" set to '1' and its "Dirty Bit" set to 'O pages "Present Bit" set to 0' and its "Dirty Bi" set to 0" pages "Present Bit" set to '0' and its "Dirty Bit" set to 1 The page is replaced after writing the flushed page to disk with the new pages "Present Bit" set to '1' and its "Dirty Bit" set to 0 d. What happens when the word referenced by the processor is in a virtual page that is NOT present in the TLB? Figure 7-38 i. The processor retrieves the virtual to physical page mapping from the ii. The processor retrieves the virtual to physical memory page mapping from ii. The processor calculates the virtual to physical memory page mapping from memory table, updates the TLB with the new mapping, and retrieves the data from the physical memory the page table in memory, retrieves the data from the physical memory, but does not update the TLB with the new mapping a base address already defined in a CPU register, updates the TLB with the new mapping, and retrieves the data from the physical memory
