MICROPROCESSOR BASED SYSTEM Show your working

QUESTION FOUR Complete the BEFORE & AFTER" table below BEFORE AND AFTER TABLE (36marts) REGISTERS BEFORE FLAGS BEFORE INSTRUCTION | REGISTERS AFTER FLAGS AFTER IXN ZVC 10010 DO: MOVE.W DI DO XNZVC Dl: DO: 12345670 DI: 7654321A D2: 012345FA D3: 6677883E 14: 01234567 XNZ VC 0 0 0 0 0 D2: ORB D2,D3 XN ZVC D3: XNZVC 0 0 0 0 0 D4: LSL.W=3.04 X NZVC D5: 12345670 XNZVC 1 1000 D5: BCHG =3D5 X NZ V C D6: ASRW =3,D6 X NZVC D6: 01234567 D7: 12345670 DS: 01234567 D9:01234567 D7: X N Z V c 1 1 1 0 0 X N Z Vc 1 1 0 1 1 X NZVC 1 1 0 0 1 IN ZVC IN ZVC BSET =3 D7 BCLR =3 DS DS: X NZ V c ASP_W =4D9 DI: X NZ V c QUESTION FOUR Complete the BEFORE & AFTER" table below BEFORE AND AFTER TABLE (36marts) REGISTERS BEFORE FLAGS BEFORE INSTRUCTION | REGISTERS AFTER FLAGS AFTER IXN ZVC 10010 DO: MOVE.W DI DO XNZVC Dl: DO: 12345670 DI: 7654321A D2: 012345FA D3: 6677883E 14: 01234567 XNZ VC 0 0 0 0 0 D2: ORB D2,D3 XN ZVC D3: XNZVC 0 0 0 0 0 D4: LSL.W=3.04 X NZVC D5: 12345670 XNZVC 1 1000 D5: BCHG =3D5 X NZ V C D6: ASRW =3,D6 X NZVC D6: 01234567 D7: 12345670 DS: 01234567 D9:01234567 D7: X N Z V c 1 1 1 0 0 X N Z Vc 1 1 0 1 1 X NZVC 1 1 0 0 1 IN ZVC IN ZVC BSET =3 D7 BCLR =3 DS DS: X NZ V c ASP_W =4D9 DI: X NZ V c