Mini-Cache problem 32 bytes of memory. 16 bytes of 2-way set-associative cache, where blocks can go anywhere within the set. Block is 4 bytes, set in cache is two blocks. Diagram the memory and cache as we have done in class. Populate memory starting with upper-case letters, then 0-5. Hint- with full associativity in the set: each block has its own set of Tag bits in the cache. Memory is not organized by sets, though blocks get assigned to sets, and load in the cache per set. 1) Break down the addressing: Tag | Set |block offset ___ ___ ____ Explain and show what happens when the CPU generates these addresses to load from memory: 2) 10010 3) 00011 4) 10000 5) 10100 6) 10111 7) 11111