MIPS

multiplication time by simply counting the number of gates along the longest (critical) path through the logic. Identify and mark on the schematics the critical path for the multiplier 3. (10 points) A 4 x 4 bits combinational multiplier is shown below. Assume that each AND or OR gate takes the same time for a signal to pass through it. You can estimate XjYo x2Yo X3Y1 XiY xoYI XoY C12 C11 I0 10 C22 Co 21 C20 HA C32 C30 FA FA $30 33 S 32 P4 For the multiplier shown above HA V half adder, FA ? full adder X is a multiplicand, Y is a multiplier, P is a product C, S are Carry In Out and Sum signals, respectively, for the adders in the schematics