Now for the next several questions, you will need the following diagram.

Let us suppose this processor supports not only add, sub, and, or$,$ lw$,$ sw$,$ beq, but also slt$,$ j$.$Which of the following instructions will fail to operate correctly if the MemToReg control signal is stuck at $0?$ Which of the following instructions will fail to operate correctly if the MemToReg control signal is stuck at $0?$ Add Sub Load Store