Numbere. Notes Label Detals A blai IS 5. Draw a NAND gate implementation of the following basic logic gates. a. An Inverter b. An AND Gate: C. An OR Gate: [ 1 Marks] [ 1 Marks] [ 2 Marks] T IT - Aa Numbere... Notes Label Detats ||| Ax | 6. Find the expression for F for the 4-to-1 MUX shown below. [ 5 Marks] F MUX Y FEBRUARY 11, 2021 Notes Label Details AMAN ha JAS B 7. Giving the level-triggered circuit below complete the timing diagrarn for signals n, out and Qurb [4 Marks) EN D1 D D-Latch B DZ out ** EN DI 02 ( ) o E