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O R Q Q 1 R EN 10 0 1 1 1 file Figure 2 SR NAND Latch, 1 EET230 Labl pl Part2 YourName 1
O R Q Q 1 R EN 10 0 1 1 1 file Figure 2 SR NAND Latch, 1 EET230 Labl pl Part2 YourName 1 1 0 Step 3 Build the Gated SR. NAND Latch circuit in Figure3 using Multisim and verify the operation of the circuit by changing the set, reset, and EN inputs. Pay attention to the state of Q and Q outputs while you change input combinations. Fill out the state table of the Gated SR NAND Latch in the order listed
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