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Objective: Design and test a 4 - bit Right shift register with serial input. Part I Use D flip - flops ( FF ) in

Objective: Design and test a 4-bit Right shift register with serial input. Part I Use D flip-flops (FF) in your design (Memory -> D Flip-Flop). Ensure the output of each FF (Q) goes to an output so the functionally of the shift register can be verified. All 4 Flip-Flop need to share a common clock which is connected to an input you control. Part II Modify the circuit so that if the register contains 0101 OR 1000 an output signal goes active (logic 1). Verify the functionally of the circuit by shifting in the two values to be detected and ensure the output goes high (logic 1).(please show a example of the circuit)
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