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OBJECTIVES 1. To investigate and analyze the operation of JK flip-flop. 2. To design a synchronous counter using JK flip-flops. SOFTWARE CEDAR Logic Simulator INTRODUCTION
OBJECTIVES 1. To investigate and analyze the operation of JK flip-flop. 2. To design a synchronous counter using JK flip-flops. SOFTWARE CEDAR Logic Simulator INTRODUCTION A counter is a digital sequential logic device that will go through a certain predefined state based on the application of the input pulses. There are two main types of counters: Asynchronous Counter and Synchronous Counter. The counter utilizes flip-flop to store binary information, where the number of flip- flops used will determine the capability of counting bits. Figure 1 shows the general clocked sequential circuit CLK Excitation lines Y Inputs Input combinational logic Memory Outputs . State variable lines Figure 1 DESIGN PROBLEM In this lab you are going to design a single traffic light system as shown in Figure 2 using J-K Flip Flops. Please show all the related step to design the synchronous counter and draw a schematic diagram using *CEDAR logic simulator. Figure 2 DISCUSSION AND CONCLUSION Write your discussion and conclusion based on objectives and tasks given. OBJECTIVES 1. To investigate and analyze the operation of JK flip-flop. 2. To design a synchronous counter using JK flip-flops. SOFTWARE CEDAR Logic Simulator INTRODUCTION A counter is a digital sequential logic device that will go through a certain predefined state based on the application of the input pulses. There are two main types of counters: Asynchronous Counter and Synchronous Counter. The counter utilizes flip-flop to store binary information, where the number of flip- flops used will determine the capability of counting bits. Figure 1 shows the general clocked sequential circuit CLK Excitation lines Y Inputs Input combinational logic Memory Outputs . State variable lines Figure 1 DESIGN PROBLEM In this lab you are going to design a single traffic light system as shown in Figure 2 using J-K Flip Flops. Please show all the related step to design the synchronous counter and draw a schematic diagram using *CEDAR logic simulator. Figure 2 DISCUSSION AND CONCLUSION Write your discussion and conclusion based on objectives and tasks given
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