Obtain the state table, state diagram, and functions of the following sequential design. Implement the design and verify the state table. Use a 4-bit Shift Register to store and display the result of 0011 + 0001 0100 S X Y Full Adder Z Q D CLK Hand-In o State table o State diagram o Functions o Results of 0011 + 0001 (stored in the 4-bit Shift Register with MSB and LSB indicated) Obtain the state table, state diagram, and functions of the following sequential design. Implement the design and verify the state table. Use a 4-bit Shift Register to store and display the result of 0101 2011 0010 X Y Di Full Subtractor B_i+1 B_i Q D CLK Hand-In o State table o State diagram o Functions o Results of 0101 - 0011 (stored in the 4-bit Shift Register with MSB and LSB indicated) Obtain the state table, state diagram, and functions of the following sequential design. Implement the design and verify the state table. Use a 4-bit Shift Register to store and display the result of 0011 + 0001 0100 S X Y Full Adder Z Q D CLK Hand-In o State table o State diagram o Functions o Results of 0011 + 0001 (stored in the 4-bit Shift Register with MSB and LSB indicated) Obtain the state table, state diagram, and functions of the following sequential design. Implement the design and verify the state table. Use a 4-bit Shift Register to store and display the result of 0101 2011 0010 X Y Di Full Subtractor B_i+1 B_i Q D CLK Hand-In o State table o State diagram o Functions o Results of 0101 - 0011 (stored in the 4-bit Shift Register with MSB and LSB indicated)