Of all the instructions executed in a processor, the following fraction of these instructions have a particular type of read-after-write (RAW) data dependence. The type of RAW data dependence is identified by the stage that produces the result (EX or MEM) and the instruction that consumes the result (1^st instruction that follows the one the produces the result, 2^nd instruction that follows, or both). Assume that the CPI of the processor is 1 if there are no data hazards.

EX to 1^st 5% (in this type of hazard an R-type or beq instruction produces a result that is needed in the following instruction)

MEM to 1^st 20% (a lw produces a result that is needed in the following instruction)

EX to 2^nd 5% (an R-type or beq produces a result needed two instructions later)

MEM to 2^nd 10% (a lw produces a result that is needed two instructions later)

a) (5 points) If we use no forwarding, what fraction of cycles are we stalling due to data hazards?

b) (5 points) if we use full forwarding what fraction of cycles are we stalling due to data hazards?

c) (5 points) What is the speedup achieved by adding full forwarding to a pipeline that had no forwarding?