On this RAM Cell Array logic diagram click on the Cell which contain the most significant bit of the first word. A. 23 RAM cell RAM cell RAM cell 2 RAM cell RAM cell RAM cell RAM cell RAM RAM cell RAM all RAM cell 10 RAM Cell 11 RAM cell 12 RAM cell 13 RAM cell 14 RAM cell 15 Read/Write look Read/Write logic Read/Write logic Read/Write logic Data in Data cu Rea Bit Write Select Data in Data out Read Bit Write Select Data in Datout Read! Write Select Data in Data ou Real Bit Wnte Select Data input Data input Read/Write Di Di Data output 0 Enable Data output Chip Select On this RAM Cell Array logic diagram click on the Cell which contain the most significant bit of the first word. A. 23 RAM cell RAM cell RAM cell 2 RAM cell RAM cell RAM cell RAM cell RAM RAM cell RAM all RAM cell 10 RAM Cell 11 RAM cell 12 RAM cell 13 RAM cell 14 RAM cell 15 Read/Write look Read/Write logic Read/Write logic Read/Write logic Data in Data cu Rea Bit Write Select Data in Data out Read Bit Write Select Data in Datout Read! Write Select Data in Data ou Real Bit Wnte Select Data input Data input Read/Write Di Di Data output 0 Enable Data output Chip Select