Only answer #2 Please

In this lab, you will be designing a majority function logic circuit with three inputs (X, Y, Z) whose output (F) is 1 only if a majority of the inputs are 1. Implement the logic circuit using a 3-to-8 Decoder (74LS138) and any other external logic gates as necessary. Draw the logic diagram using a 3-to-8 Decoder (74LS138) and any other external logic gates as necessary based on the above truth table. Note that the chip enable signal El (pin 4) and E2 (pin 5) must be connected to ground (GND). also E3 signal must be connected to +5V (I CC) for the Decoder chip to work properly. To power the chip, connect pin 16 to +5K (VCC) and pin 8 to ground (GND). See the data sheet posted on D2L for other pin number assignments for the inputs and outputs