ou are working at Hal Inc. designing the next generation CPU. The CPU is implemented using CMOS

transistor technology, and its ISA contains three types of instructions. Some information about your system

follows:

Compiler C$1$ Output Mix

Instr. Type Mix

Arithmetic $50\%$

Memory $30\%$

Control $20\%$

$($the above is on benchmark B$)$

CPU Cycle Count

Type CPI

Arithmetic $2$

Memory $3$

Control $4$

CPU clock rate: $2$GHz

$1.$ The current $[$CMOS$]$ chip requires $80$W of power. The packaging team tells you that they can dissipate

at most $50$W$.$ What clock rate do you tell your VLSI team to change the clock rate to$?$

$2.$ A certain program P requires $5$ s$.$ of CPU time, but must also do I$/$O of k bytes. I$/$O is of course

slower, and an I$/$O transfer of b bytes requires b $+10$ ms$.($the $10$ corresponds to a fixed startup time$).$

You may split I$/$O into any number of transfers $$ for example, k transfers of $1$ byte each, k$/2$ transfers

of $2$ bytes each, $...,1$ transfer of k bytes. The customer requires that you take at most $8$ s$.($total$)$

but the architecture team would prefer smaller transfers to avoid hogging the I$/$O bus. Determine

the best transfer size to satisfy all constraints. You may assume that k ranges over values for which

your results make sense and also do not need to use floor and ceiling functions $($so your answer is an