Out of Order SuperScalar For this problem, you may assume that these instruc- tions are running on the 5-stage MIPS pipeline that you've seen in class with full forwarding support. You may assume that all of the instructions have been fetched and decoded and the processor is able to execute them in any order given that they are not dependent on any of the other instructions. # This is the smoothing of a non-edge/corner pixel with # its manhattan distance neighbors for a 25x25 pixel image # (the above information is not necessary to solve the problem) ideal 2-issue 4-issue 5-issue 01) lw $to, 0($a0) 02) lw $t1, 100 ($a0) 03) lw $t2, -100 ($a0) 04) 1w $t3, 4(Sao) 05) lw $t4, -4 ($a0) 06) srl $to, Sto,1 07) srl $t1, $t1, 3 ALS 08) add Sto, St0. Sti 09) srl $t2, $t2, 3 10) add $to, $to, $t2 11) srl $t3, $t3, 3 12) add $to, $to, $t3 13) srl $t4, $t4, 3 14) add $t0, $to, $t4 15) sw $to, 0($a0) (a) For the code above, provide the earliest cycle that the instruction can be started at, given 0 to be the first cycle (state cycle number against each instruction right above in the start column). Assume load instruction 1 starts at cycle 0. Don't forget to account for any possible stalls which would delay the first available cycle that an instruction could be scheduled on. (b) Given a 2-issue out of order superscalar processor, list which instructions are executed in which cycle in order to reduce the total number of cycles needed to run the code above. (State cycle number against each instruction right above- in the opt-2 column.) (c) Repeat (b) given a 4-issue out-of-order superscalar and place your answer in the column labeled opt-4 above (d) Repeat b) given a 5-issue out-of-order superscalar and place your answer in the column labeled opt-5 above (e) For the 5-issue sup describe whether it performed definitively better than the 4-issue superscalar and describe any bottlenecks that limited speedup. Out of Order SuperScalar For this problem, you may assume that these instruc- tions are running on the 5-stage MIPS pipeline that you've seen in class with full forwarding support. You may assume that all of the instructions have been fetched and decoded and the processor is able to execute them in any order given that they are not dependent on any of the other instructions. # This is the smoothing of a non-edge/corner pixel with # its manhattan distance neighbors for a 25x25 pixel image # (the above information is not necessary to solve the problem) ideal 2-issue 4-issue 5-issue 01) lw $to, 0($a0) 02) lw $t1, 100 ($a0) 03) lw $t2, -100 ($a0) 04) 1w $t3, 4(Sao) 05) lw $t4, -4 ($a0) 06) srl $to, Sto,1 07) srl $t1, $t1, 3 ALS 08) add Sto, St0. Sti 09) srl $t2, $t2, 3 10) add $to, $to, $t2 11) srl $t3, $t3, 3 12) add $to, $to, $t3 13) srl $t4, $t4, 3 14) add $t0, $to, $t4 15) sw $to, 0($a0) (a) For the code above, provide the earliest cycle that the instruction can be started at, given 0 to be the first cycle (state cycle number against each instruction right above in the start column). Assume load instruction 1 starts at cycle 0. Don't forget to account for any possible stalls which would delay the first available cycle that an instruction could be scheduled on. (b) Given a 2-issue out of order superscalar processor, list which instructions are executed in which cycle in order to reduce the total number of cycles needed to run the code above. (State cycle number against each instruction right above- in the opt-2 column.) (c) Repeat (b) given a 4-issue out-of-order superscalar and place your answer in the column labeled opt-4 above (d) Repeat b) given a 5-issue out-of-order superscalar and place your answer in the column labeled opt-5 above (e) For the 5-issue sup describe whether it performed definitively better than the 4-issue superscalar and describe any bottlenecks that limited speedup
