please answer all the blank, espacially for the last two

Below is a list of 32-bit memory references in a byte addressable CPU, given as 32-bit word address in decimal (not a byte address) 6, 191, 22, 79, 159, 241, 102 What is the hex byte address of the word for each address in the order above, separated by commas and 1 space? (format is the following: 0x33557794, 0x11223348, etc.) ab For a directed-mapped cache comprises of 8 cache blocks of 1 one-word blocks, what are the cache tags for each of these addresses? Assume the cache tag is aligned with the byte address in memory. For this exercise, the format of the tags should be 32-bits in hex, or 8 hex characters. The lower bits that are not associated with the tag should be inserted with Os. (format example only and is not related to the answer is the following: 0x33557700, 0x11223300, etc.) ab For a directed-mapped cache comprises of 8 cache blocks of 1 one-word blocks, what are the block address or index for each of these addresses? The format should be in binary such as 1001b, 1100b. 0001b, etc ab Now, lets look at a 2-way set associative cache of 4 sets comprising of blocks of one-world blocks. What are the cache tags for each of these addresses? For this exercise, the format of the tags should be 32-bits in hex, or 8 hex characters. The lower bits that are not associated with the tag should be inserted with Os. (format example only and is not related to the answer is the following: 0x33557700, 0x11223300, etc.) For the 2-way set associative cache above, what would be the addresses associated with set 10b for position 1 and 2 of this set at the end of the address stream above assuing LRU replacement algorithm? Assume this cache is completely empty at the start, and the first value of a set is placed in position element 1 of the set. (format, the complete decimal address such as 16, 32) ab