PLEASE ANSWER ONLY (b). NEEDED URGENTLY. THANK YOU.

Consider the modification of the master-slave latch pair in Fig. 2. a) Under a regularly changing clock CK, specify the sequence hi. Ja- a 1s of output signals appearing at Q at the end of the first four clock cycles, given that the input signals arriving at D during these clock cycles are 1,0, 1 and 1, respectively. Assume that the initially latched value in the master latch of the pair is Q1 1 and it is Q2 I in the slave. The input is supposed to be stable during the second half of each clock cycle, and the output, too, will be recorded in the second half of the clock cycles only Figure 2: A modified master-slave latch. b) Will the output of the circuit remain stable during the entire clock cycle each time for every input, regardless of the initially latched values in Qi and Q2? Explain. Do not count propagation delays