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please answer question 20 17. Consider the following hypothetical instruction: SubMem R1, mem1, nem2 This instruction works as follows: R1|mem1mem22 In a multi-cyele datapath implementation,

please answer question 20
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17. Consider the following hypothetical instruction: SubMem R1, mem1, nem2 This instruction works as follows: R1|mem1mem22 In a multi-cyele datapath implementation, this instruction will: a. Use the MDR twice b. Use the ALU once c. Use the "shift to left" unit twice d. None of the above 18. Consider the following hypothetical instruction: Mems men1, R1, mem2 This instruction works as follows: |men-1| \& R1 - |menn2| One of the following is correct about this instruction: a. It will not need the B register b. It will require writing into MDR twice c. It will require writing into the ALUout three times d. None of the above 19. By comparing the hypothetical instructions given in Questions (17) and (18), if we ren these instructions on the same processor, then one of the following is correct: a. Both instructions have the same CPI b. Meins executes faster than SubVem c. SubMem executes faster than MemS d. Mems does not need the MDR 17. Consider the following hypothetical instruction: SubMem R1, mem1, nem2 This instruction works as follows: R1|mem1mem22 In a multi-cyele datapath implementation, this instruction will: a. Use the MDR twice b. Use the ALU once c. Use the "shift to left" unit twice d. None of the above 18. Consider the following hypothetical instruction: Mems men1, R1, mem2 This instruction works as follows: |men-1| \& R1 - |menn2| One of the following is correct about this instruction: a. It will not need the B register b. It will require writing into MDR twice c. It will require writing into the ALUout three times d. None of the above 19. By comparing the hypothetical instructions given in Questions (17) and (18), if we ren these instructions on the same processor, then one of the following is correct: a. Both instructions have the same CPI b. Meins executes faster than SubVem c. SubMem executes faster than MemS d. Mems does not need the MDR

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