please aolve these questions

Tt cullows arer to express ther desn vDI constnitspyoem tool can conertsthe ilog prghar to ca dosc ption that war wred tom at was wred to make chi n, Like VLS, 7. Experimental work Step 1 - Circuit Construction and Verification Design using Verilog HDL a code that does an NAND function to three inputs X, Y, Z and represents the output on output F 1- Design a test bench using 3 loops to test the functionality of all the 8 combinations of the above equation/circuit. 2