Please check / answer these questions. Note that some of the questions continue to the next page. For questions with the design module, only the test bench is require.

1. Write the program to verify whether white space "Carriage Retum" and "Formfeed" in "heiloworld. v " work or not, and show the result. 2. If a variable name is defined using a keyword, write a code snippet to look at what will happen and show error/warning information. 3. When a module name is \& $S abc_123, how to make it pass compilation by writing a program to verify? 4. Define a variable type "trit, and make two devices in the same value (e.g. 1,1) and different value(e.g. z,x) to drive it, what do you get and show running results? Based on below code, write down teabench to see waveform module tri_variable_example ( ); tri tri_variable; initial begin tri_variable = 1'b1: \#1 tri_variable = I'bz; \$display(" Value of tri_variable: sob" *, tri_variable); end endmodule module tri_variables tri drive1, drive2: / Declare two tri variables anitial begin drive 1=1 drive 2=1 \#10; drivel =xi drive 2=x \$display("drive 1: \%ob drive2: \%", drivel, drive2); end chalmodule drive 1: I drive2: I drive l: z drive 2;x 5. Retype "woritrior" and "wanditriand" test programs on the handout and assign all I6combination values to them. Compare the results with the values in truth table. Based on below design code, write lesthench module triOR (inpet a, b, c, output z); assign z=abc : cndmodule module triAND (input a, b. c. output z); assign z= a \& b \& c; endmodule module testbench: reg a,b,c wire z1,72; triOR dutI (a,b,c,41); triAND dut 2(a,b,c,z2); initial begin for (a=0;a