Please draw a diagram/design for this. -

Design a floating point multiplication unit with overflow/underflow detection feature for multiplying two 32-bit floating point numbers in IEEE 754 format. When underflow occurs (i.e. the exponent of the result is too negative to fit the field), set both exponent and fraction parts with all 0s (i.e. the result is +0.0 or -0.0 in this case.) When there is overflow (i.e. the exponent of the result is too positive to fit the field), set the exponent to all 1s, and fraction to all 0s. In both cases the sign bit should be calculated as usual. Also use a truncation unit instead of the rounding method so that only one time/round of normalization needed. Trace your design with 3 sets of given data.