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please explain thoroughly, I am very lost 1. (chapter 4.1) Consider the following instruction: Instruction: sub Rd, Rs, Rt Interpretation: Reg[Rd] - Reg[Rs] - Reg[Rt]

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please explain thoroughly, I am very lost
1. (chapter 4.1) Consider the following instruction: Instruction: sub Rd, Rs, Rt Interpretation: Reg[Rd] - Reg[Rs] - Reg[Rt] a. What are the values of control signals generated by the control in Figure 4.2 for the above instruction? (4 points) b. Which resources (blocks) perform a useful function for this instruction? (2 points) c. Which resources (blocks) produce outputs, but their outputs are not used for this instruction? (2 points) d, which resources (blocks) produce no output for this instruction? (2 points) Branch XC3 Add Add *CS ALU operation Data MemWrite Address Register# Registers Register # PC Address Instruction ALU Zero Instruction memory Data memory Register # RegWrite Data MemRoad Control FIGURE 4.2 The basic implementation of the MIPS subset, including the necessary multiplexors and control lines. The top multiplexor ("Mux") controls what value replaces the PC (PC + 4 or the branch destination address the multiplexor is controlled by the gate that "AND" together the Zero output of the ALU and a control signal that indicates that the instruction is a branch. The middle multiplexor, whose output returns to the register file is used to steer the output of the ALU (in the case of an arithmetic-logical instruction) the output of the data memory (in the case of a load) for writing into the register file. Finally, the bottommost multiplexor is used to determine whether the second ALU input is from the registers (for an arithmetiological instruction or a branch) or from the office field of the instruction for a load or store). The added control lines are straightforward and determine the operation performed at the ALU whether the data memory should read or write, and whether the registers should perform a write operation. The control lines are shown in color to make them caster to

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