PLEASE GIVE THE ANSWERS ONLY, I DON'T KNOW MUCH ABOUT THIS SUBJECT.

A (read data 1): D(Write data): F(MuxA) : B (read data 2): C (sign extend input): K(Write Data) E(RegWlrite): N(Mux3) L(Mem write): I(ALU output): M(Mem read): P(Mux3output):O(MEM/WB)writereg