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Please help me create an ALU Controller module that follows the truth table given below and uses the given module definition. Thank you so much.

Please help me create an ALU Controller module that follows the truth table given below and uses the given module definition. Thank you so much.
` timescale 1 ns /1 ps
// Module definition
module ALUController (
ALUOp , Funct7, Funct3, Operation
);
// Define the input and output signals
// Define the ALUController modules behavior
endmodule //ALUController 1.2 ALUController
The inputs to the ALUController are the ALUOp, Funct3, and Funct7. ALUOp comes from the Con-
troller and Funct 3 and Funct 7 come from the Datapath. The output of the ALUController is the 4-bits
operation code which goes to the ALU_CC input of the datapath. You see the block diagram of the ALU-
Controller in figure 3.
Figure 3 : ALUController.
\table[[operation,Operation code],[AND, ANDI,0000],[OR, ORI,0001],[ADD, ADDI, SW, LW,0010],[SUB,0110],[SLT, SLTI,0111],[NOR, NORI,1100]]
We need to find a relation between the inputs and the output of the ALUController. Table 4 shows this relation.
Table 4 : The truth table for the 4 operation code.
\table[[,Funct7,Funct3,ALUop,Operation],[AND,0000000,111,10,0,0,0,0],[OR,0000000,110,10,0,0,0,1],[NOR,0000000,100,10,1,1,0,0],[SLT,0000000,010,10,0,1,1,1],[ADD,0000000,000,10,0,0,1,0],[SUB,0100000,000,10,0,1,1,0],[ANDI,-,111,00,0,0,0,0],[ORI,-,110,00,0,0,0,1],[NORI,-,100,00,1,1,0,0],[SLTI,-,010,00,0,1,1,1],[ADDI,-,000,00,0,0,1,0],[LW,-,010,01,0,0,1,0],[SW,-,010,01,0,0,1,0]]
"-" in Table 4 means there could be any values there.
Here you see the equation for the first bit of the operation as an example:
assign Operation[0]=
((Funct3==3'b110)||((Funct3==3'b010)??&&(ALUOp[0]==1'b0)))
?1'b1 : 1'b0;
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