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please I need an explanation about how does the MBR works in here and I would like to know the gates logics or how can

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please I need an explanation about how does the MBR works in here and I would like to know the gates logics or how can I design something do the same job of the MBR in logisim?

MAR Memory MDRregisters To and from main PC LV Control signals Enable onto B bus Write C bus to register TOS OPC Cbus- _Bbus ALU control ALU Shifter Shifter control Figure 4-1. The data path of the exampcotue used in this chapter

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