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PLEASE INCLUDE ALL THE PROCESS. Fill in the following table for a fully set associative, 3-block cache for the block addresses (already shifted for byte
PLEASE INCLUDE ALL THE PROCESS.
Fill in the following table for a fully set associative, 3-block cache for the block addresses (already shifted for byte offset) shown in the 2nd column. Use a LRU replacement policy. The Block columns show the state of the block after the block address in that row is handled The blocks fill from left to right. For the "Hit/Miss" column, valid answers are either "Hit" or "Miss". For the Block-# columns, valid answers are of the form "Mem(n)" where n is a block address or "Empty" Block Step Hit/Miss Block-0 Block-1 Block-2 Address 1 0 2 2 3 4 2 4 0Step by Step Solution
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