please provide the circuit(step6) in quartus II software

Design of Random Synchronous Counter OBJECTIVE: Learn how to design and implement random synchronous counter which counts the following sequence: 0-1-3-2-6-7-5-4 ther back to 0 and repeats the sequence. EQUIPMENT REQUIRED: QUARTUS and DE1 BOARD. To design use positive edge triggered JK flipflop IC 7476, and IC 7447which is BCD to seven segment decoder. To display the sequence of counting use one of the seven segment display of DE1 board. Use q[23] member of frequency dividing circuit. PROCEDURE: Students are required to write the following six steps in the lab report. 1) Specify the counter sequence and draw a state diagram. 2) Drive a next state table from the state diagram. 3) Develop a transition table showing the flip-flop inputs required for each transition. 4) Transfer the J and K states from the transition table to Karnaugh maps. There is a Karnaugh map for each input of each flipflop. 5) Group the K map cells to generate and drive the logic expression for each flip-flop input. 6) Implement the expression with combinational logic and combine with the flip-flops to create the counter. then finally program your DE1 board. Please read article 9-5 of our textbook. Page\# 505. RESULT: Please show the instructor that your counter works before leaving class