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Please show step by step work to get the solution for question 4 only. Thank you : ) 4. For this question, ignore pipelining and

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Please show step by step work to get the solution for question 4 only. Thank you : )

4. For this question, ignore pipelining and assume fetch and execute address data happen together. An ARM controller fetches & executes the following two 2 16-bit instructions (hex machine code) in the order shown: 0x0001 0x0001 0x0001 0x0001. 0x0001. 0x0001. 0xB208 0x9AF3 After execution of these two instructions, the PC holds 0x0001.03C2. Given these events, sketch the instruction memory that must have existed for these two instructions by defining the memory address and value for each hex machine code byte. Note that ARM instruction fetches are little endian. You can fill in the relevant blanks in the figure on the right or create your own similar sketch address data 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 5. The following two 32-bit words are stored to 8-bit memory, in sequence, using biq endian OxA0E42818 0x0B95D277 If these values are stored in RAM starting at 0x2000.10EC, sketch the data memory for these two words by defining the memory address and byte values for each memory cell. You can fill in the relevant blanks in the figure on the riaht or create vour own similar x2000 sketch. 0x2000. 4. For this question, ignore pipelining and assume fetch and execute address data happen together. An ARM controller fetches & executes the following two 2 16-bit instructions (hex machine code) in the order shown: 0x0001 0x0001 0x0001 0x0001. 0x0001. 0x0001. 0xB208 0x9AF3 After execution of these two instructions, the PC holds 0x0001.03C2. Given these events, sketch the instruction memory that must have existed for these two instructions by defining the memory address and value for each hex machine code byte. Note that ARM instruction fetches are little endian. You can fill in the relevant blanks in the figure on the right or create your own similar sketch address data 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 0x2000. 5. The following two 32-bit words are stored to 8-bit memory, in sequence, using biq endian OxA0E42818 0x0B95D277 If these values are stored in RAM starting at 0x2000.10EC, sketch the data memory for these two words by defining the memory address and byte values for each memory cell. You can fill in the relevant blanks in the figure on the riaht or create vour own similar x2000 sketch. 0x2000

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